The Tundra Tsi620™ is the latest offering in Tundra’s industry-leading family of RapidIO devices. The Tsi620 provides the functionality of both a RapidIO switch and a non-transparent RapidIO-to-PCI bridge. The RapidIO switch offers 50 Gbps aggregate bandwidth, while the RapidIO-to-PCI bridge enables legacy systems to link to the high-bandwidth RapidIO interconnect. The Tsi620 contains all the benefits of Tundra's family of RapidIO switches and adds interfaces to PCI-enabled processors, as well as an interface to low-cost FPGAs.

The RapidIO switch offers up to three 10 Gbps ports as well as a port for 10 Gbps RapidIO over an XGMII physical interface. The device can be used to connect clusters of DSPs and microprocessors required for high performance embedded computing applications, such as wireless baseband 3G LTE, WiMAX, and wideband CDMA systems. It can also be used in wireline networking, video, and military applications to reduce cost while increasing performance. Alternatively, one or more ports from the RapidIO switch can be used for backplane or front panel connectivity.

This FPGA port on the RapidIO switch permits the use of the Tsi620 with low-cost non-SerDes FPGA, or eliminates a discrete SerDes from the system, substantially reducing system-level cost.

The RapidIO-to-PCI bridge enables legacy systems to link to DSP clusters through the high-bandwidth RapidIO Switch. By leveraging the PCI-to-RapidIO bridging capability, system OEMs are able to use competitively priced embedded processors, while leveraging the investment in existing embedded software.

Business Benefits

The Tsi620 builds on the RapidIO features of Tundra’s industry leading RapidIO switch family. The device is optimized to reduce overall system-level cost while increasing performance, leveraging a variety of interfaces.

The device’s RapidIO switch supports up to seven x1 or four x4 endpoints. The highly configurable RapidIO switch enables system designers to support multiple types of endpoints, such as DSPs, ASICs, and microprocessors.

The RapidIO switch ports allow an interface to today’s multi-core DSPs resulting in up to three times the processing horsepower in the same form factor as previous generations for twice the price (or less) of previous generation single core DSPs. Thus, in the same form factor the Tsi620 gives the system OEM, 1.5 to 2x the processing power for the same dollar invested.

The FPGA port on the RapidIO switch permits the use of the Tsi620 with a low-cost, non-SerDes FPGA, or eliminates a discrete SerDes from the system, substantially reducing system-level cost. The fact that non-SerDes FPGAs can be used with the Tsi620 to access processing clusters, means that system OEMs can further reduce system cost by taking the FPGA to hard copy. In addition to the above, the elimination of the SerDes in the FPGA interface can reduce latency by up to 300 ns, which at an application level simplifies the task of algorithm partitioning when addressing jitter sensitive applications like voice and video.