The Tundra Tsi110™ is designed for use with PowerPC® processors from IBM and Freescale. The device builds on Tundra’s extensive experience in host bridging, in particular the Tsi108 and Tsi109. It delivers cost-effective performance for customers in the consumer appliance market for applications like video surveillance, video/IP, set-top boxes, and printers. The Tsi110 is also ideal for entry-level communications, storage, and industrial applications.

Business Benefits

Superior I/O Connectivity and Integration

The Tsi110 supports a 167-MHz 60x bus, DDR2 SDRAM, Gigabit Ethernet , a 133-MHz 64-bit PCI-X Interface, and Flash. These interfaces allow designers flexible I/O connection options from the processor to various components on the board.

Lowers System Cost

The Tsi110 was designed with features that lower system cost. An integrated clock generator eliminates the need for external components, saving as much $10 per board. The DDR2 SDRAM interface means customers can take advantage of lower SDRAM prices as compared to DDR, and can save on the cost of external termination resistors that are not required due to on-die termination. The device’s low-power design allows fanless operation which further reduces board cost and real estate requirements.

Lowers System Power

The Tsi110 is ideal for power-sensitive applications. DDR2 memory consumes 50% less power than DDR. A power management block in the Tsi110 supports various power saving modes implemented on PowerPC processors. The Tsi110 reduces active power by disabling unused ports and clocks. Pre-charge power down and quiet standby power reduction modes on the Memory Controller reduce power consumption even more.

Reduces Time to Market

Fewer components on the board mean shorter development cycles. In addition, the Tsi110’s superior signal integrity ensures that customers can shorten debug time and bring their systems to market faster. DDR2 support offers superior signal integrity due to on-die termination. Flip-chip packaging offers better electrical and thermal characteristics. VSS within I/O signals keeps I/O return current out of the core and is used as shields within the package to further reduce noise. VDD references within the memory and processor signals reduces coupling and noise from these high-speed interfaces and keeps I/O current out of the core. The generous power and ground signals in a checkerboard pattern reduce the length of current loop between power and ground and provide the optimum pattern for effective decoupling.